Organik DAC Insight
Let us try to understand how the architecture of the Organik DAC differs from current integrated converters, the chips for example produced by AKM or ESS Technology, and possibly also from the discrete R-2R DACs. The former are over-sampling converters, which in a first step increase the sampling rate of the original signal by exploiting interpolation filters of different types (FIR or IIR, minimum phase, linear phase, short or long, etc.), which in some implementations can be chosen by the user. In a subsequent step they then reduce the number of sample bits through Sigma-Delta modulators, filtering the resulting quantization noise out of the audible band (noise shaping). The above operations thus reduce the quantization (usually to 5 or 7 bits) and raise the sampling rate, even up to tens of megahertz. Obviously, there is no loss of information because the sampling theory is exploited, which allows this type of operation. The ultimate goal is to optimize the conversion, simplifying the conversion circuits compared to a 24-bit D/A stage for example. With fewer bits to handle, in fact, errors are minimized (fewer bits = fewer switches= less chance of error) while increasing Fs allows digital artifacts to be moved away from the audible band so as to take advantage of low-slope analog reconstruction filters, which less affect the phase of the output signal.

The architecture adopted by Linn (Figure 1) operates up-sampling in the same way but differs because after the SDM (Sigma Delta Modulator) stage it introduces an additional modulation to obtain a PWM (Pulse Width Modulation) stream. Basically, a stream whose duty cycle (the time duration of the logic high or low, bit 1 or 0) is proportional to the analog signal, the concept employed, for example, in class-D amplifiers. This makes it possible to employ an even simpler and consequently accurate conversion stage, ideally with two individual parallel DACs/switches, one for positive and one for negative branch, in the case of a differential signal. Then simply remove the high-frequency carrier, with a mild filter, and the conversion is done. Using a DAC circuit with a single switched-capacitor architecture would result in high RC values and high sensitivity to possible clock errors (resulting in jitter). To overcome this problem Linn employed multiple current-output DAC circuits placed in parallel to form a sequence of filters with unity delay between each element (Figure 2).

This architecture is known in electronics as the AFIR , Analog Finite Impulse Resposnse filter. Such a filter is modeled to counteract the shape of the noise, obtained after SDM modulation, inherently contained out-of-band in the digital stream. The Organik circuit was developed with discrete components ( apart from the inevitable signal processing section carried out by an FPGA ) but because of what has just been described it is evidently different from discrete DACs at R2-R architectures that employ more complex, high-bit-count logic. According to Linn, the combination makes the system immune to many of the problems that plague these discretized designs, where small errors in switching times or resistor values can generate distortion. The Sigma-Delta/PWM/AFIR system has also recently been implemented by the new generation of Cirrus Logic chips (CS440XS/P).




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